1. Field of the Invention
The present invention relates to a semiconductor integrated circuit of a low power consumption type, and more particularly, it relates to a semiconductor integrated circuit of a low power consumption type that is capable of operating under a plurality of supply voltages.
2. Description of the Related Art
In recent years, there have been significant advancements in architectures of semiconductor integrated circuits for processing various kinds of data such as image, video, and audio signal. Furthermore, a power consumption of semiconductor integrated circuits has been rapidly increased. For example, there are some processor chips in MPU (Microprocessor unit) and DSP (digital Signal Processing) whose power consumption becomes approximately more than several Watts from approximately several tens mW in 1980.
When the power consumption of a chip of a semiconductor integrated circuit is more than several watts, it is difficult to contain the chip in a plastic package that is relatively cheep in cost. This causes to increase the cost of packaging and cooling. Recently, since movable devices such as portable telephone devices and the like are the object of public attention all over the world and widely used, it is required to reduce a power consumption of a chip of a semiconductor integrated circuit so that the movable devices using a battery can be operated for a long time period. Under this circumstance, it becomes the important problem to reduce a power consumption of LSIs.
There are various technical approaches to reduce a power consumption of a CMOS circuit, for example, to reduce a load capacity and a switching probability. In general, because the power consumption is in proportion to the square of the voltage potential of a power source, it is more effective to reduce the voltage potential of the power source. However, when the voltage potential of the power source is reduced, the delay time of operation in a circuit is increased and the processing performance of the LSI is also decreased because the magnitude of a drain current in transistors is decreased.
In conventional techniques, various kinds of methods have been proposed in order to maintain the processing performance of the LSI.
FIG. 1 is a diagram showing a configuration of modules 21 and 23 incorporated in a conventional semiconductor integrated circuit 9. This conventional semiconductor integrated circuit 9 operates under different supply voltages in a same semiconductor chip, namely having modules as a low power cell region 21 designated by fine lines and modules as a high power cell region 23 designated by solid lines. It is thereby possible to reduce a power consumption of a semiconductor integrated circuit according to this configuration of the conventional semiconductor integrated circuit in which a supply voltage to be desired is changed per module.
However, this conventional configuration of the conventional semiconductor integrated circuit causes a case in which it becomes difficult to keep a desired operation speed in a module when the entire voltage potential for driving this module is reduced. For example, the driving performance of a cell in this module to drive a device as a large load located in the outside of this module is decreased and a delay time is increased by reducing the magnitude of the supply voltage. When this cell is on a signal line (as a critical pass) having a strict timing, the entire performance of the chip of the semiconductor integrated circuit is reduced.
In addition, a time required for switching gates incorporated in this cell becomes long, and the power consumption of this cell corresponding to the increasing of the magnitude of a penetrate current is also increased. Furthermore, this bad influence affects the following circuits because this cell generates bad signal outputs and provides the bad signal outputs to the following circuits. The generation of the bad signal outputs causes to increase a signal delay and a power consumption in the following circuits.
Thereby, the conventional semiconductor integrated circuit has a drawback in which it is difficult to obtain a desired merit or the performance of the conventional semiconductor integrated circuit becomes greatly low by reducing the magnitude of the supply voltage, because the magnitude of the supply voltage is changed per block or per module in the conventional semiconductor integrated circuit.